Regviz

Silicon Labs /EFR32MG24A020F1536IM40 /VDAC1_S /CMD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CMD

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/VDAC1_S/CMD#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0EN)CH0EN 0 (CH0DIS)CH0DIS 0 (CH1EN)CH1EN 0 (CH1DIS)CH1DIS 0 (CH0FIFOFLUSH)CH0FIFOFLUSH 0 (CH1FIFOFLUSH)CH1FIFOFLUSH 0 (SINEMODESTART)SINEMODESTART 0 (SINEMODESTOP)SINEMODESTOP

Description

No Description

Fields

CH0EN

DAC Channel 0 Enable
CH0DIS

DAC Channel 0 Disable
CH1EN

DAC Channel 1 Enable
CH1DIS

DAC Channel 1 Disable
CH0FIFOFLUSH

CH0 WFIFO Flush
CH1FIFOFLUSH

CH1 WFIFO Flush
SINEMODESTART

Start Sine Wave Generation
SINEMODESTOP

Stop Sine Wave Generation

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data